loadingFeatures
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Interrupts
—Seven external interrupt request (IRQ) lines—Twelve port pins with interrupt capability
—The MPC866P and MPC866T have 23 internal interrupt sources; the MPC859P, MPC859T, and
MPC859DSL have 20 internal interrupt sources.
—Programmable priority between SCCs (MPC866P and MPC866T)—Programmable highest priority requestCommunications processor module (CPM)—RISC controller
—Communication-specific commands (for example, GRACEFUL STOP TRANSMIT, ENTER HUNT MODE, and
RESTART TRANSMIT)
—Supports continuous mode transmission and reception on all serial channels —Up to 8-Kbytes of dual-port RAM
—MPC866P and MPC866T have 16 serial DMA (SDMA) channels; MPC859P, MPC859T, and
MPC859DSL have 10 serial DMA (SDMA) channels.—Three parallel I/O registers with open-drain capabilityFour baud rate generators
—Independent (can be connected to any SCC or SMC)—Allow changes during operation—Autobaud support option
MPC866P and MPC866T have four SCCs (serial communication controller); MPC859P, MPC859T, andMPC859DSL have one SCC; and SCC1 on MPC859DSL supports Ethernet only.—Serial ATM capability on all SCCs—Optional UTOPIA port on SCC4
—Ethernet/IEEE 802.3 optional on SCC1–4, supporting full 10-Mbps operation—HDLC/SDLC
—HDLC bus (implements an HDLC-based local area network (LAN))—Asynchronous HDLC to support PPP (point-to-point protocol)—AppleTalk
—Universal asynchronous receiver transmitter (UART)—Synchronous UART—Serial infrared (IrDA)
—Binary synchronous communication (BISYNC)—Totally transparent (bit streams)
—Totally transparent (frame based with optional cyclic redundancy check (CRC)
Two SMCs (serial management channels) (MPC859DSL has one SMC (SMC1) for UART.)—UART
—Transparent
—General circuit interface (GCI) controller
—Can be connected to the time-division multiplexed (TDM) channels
MPC866/MPC859 Hardware Specifications, Rev. 2
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Freescale Semiconductor
Features
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One serial peripheral interface (SPI)—Supports master and slave modes
—Supports multiple-master operation on the same busOne inter-integrated circuit (I2C) port—Supports master and slave modes—Multiple-master environment support
Time slot assigner (TSA) (MPC859DSL does not have TSA.)
—Allows SCCs and SMCs to run in multiplexed and/or non-multiplexed operation
—Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user-defined—1- or 8-bit resolution
—Allows independent transmit and receive routing, frame synchronization, and clocking—Allows dynamic changes
—On MPC866P and MPC866T, can be internally connected to six serial channels (four SCCs and two
SMCs); on MPC859P and MPC859T, can be connected to three serial channels (one SCC and two SMCs).
Parallel interface port (PIP)—Centronics interface support
—Supports fast connection between compatible ports on MPC866/859 or MC68360PCMCIA interface
—Master (socket) interface, compliant with PCI Local Bus Specification (Rev 2.1)—Supports one or two PCMCIA sockets whether ESAR functionality is enabled—Eight memory or I/O windows supportedDebug interface
—Eight comparators: four operate on instruction address, two operate on data address, and two operate on
data.
—Supports conditions: = ≠ < >
—Each watchpoint can generate a breakpoint internallyNormal high and normal low power modes to conserve power
1.8 V core and 3.3 V I/O operation with 5-V TTL compatibility; refer to Table6 for a listing of the 5-Vtolerant pins.
357-pin plastic ball grid array (PBGA) packageOperation up to 133 MHz
MPC866/MPC859 Hardware Specifications, Rev. 2
Freescale Semiconductor
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